horizontal rule

Luigi Pomante

Dottore di Ricerca in Ingegneria Informatica (PhD)

horizontal rule

Home Page

Attività di ricerca

Attività didattica

Curriculum Vitae ITA

Curriculum Vitae ENG

 

EU Research Projects Publications (pre-print versions)

 

The following items have been made available in pre-print version to satisfy the OpenAcess rule related to the following ECSEL-JU European research projects: SAFECOP, AQUAS, MEMAGAMART2, AFARCLOUD, FITOPTIVIS, COMP4DRONES, FRACTAL, IREL.

 

Papers in proceedings, articles in journals, book chapters,…

– V. Stoico, V. Muttillo, G. Valente, F. D’Antonio. ”CC4CS: A Unifying Statement-Level Performance Metric for HW/SW Technologies”, Euromicro Conference on Digital Systems Design (DSD) - WIP Session, 2017. Link

– D. Ciambrone, V. Muttillo, G. Valente, L. Pomante, “HW/SW Co-Simulator for Embedded Heterogeneous Parallel Systems”, In Euromicro Conference on Digital Systems Design (DSD) - WIP Session, 2017. Link

– V.  Muttillo,  G.  Valente,  D.  Ciambrone,  V.  Stoico,  and  L.  Pomante, “HEPSYCODE-RT:  a  Real-Time  Extension  for  an  ESL  HW/SW  Co-Design  Methodology”,  Proceedings  of  the  10th  Workshop  on  Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO’18), ACM, New York, NY, USA, 2018. https://dl.acm.org/citation.cfm?id=3180670, doi>10.1145/3180665.3180670. Link

– V.  Muttillo,  G.  Valente,  and  L.  Pomante,  “Criticality-driven  Design Space Exploration for Mixed-Criticality Heterogeneous Parallel Embedded Systems”, In Proceedings of the 9th Workshop and 7th Workshop on Parallel Programming and RunTime Management Techniques for Many-core  Architectures  and  Design  Tools  and  Architectures  for  Multicore Embedded  Computing  Platforms  (PARMA-DITAM  ’18).  ACM,  New York, NY, USA, 2018, pp. 63-68. https://dl.acm.org/citation.cfm?id=3183782, doi>10.1145/3183767.3183782. Link

– V. Muttillo,  G. Valente,  L. Pomante, V. Stoico, F. D’Antonio, and F. Salice, “CC4CS: an Off-the-Shelf Unifying Statement-Level Performance Metric for HW/SW Technologies”, In Companion of the 2018 ACM/SPEC International Conference on Performance Engineering (ICPE '18), ACM, New York, NY, USA, 2018, pp. 119-122. https://dl.acm.org/citation.cfm?id=3186291, doi>10.1145/3185768.3186291. Link

– V. Muttillo, G. Valente and L. Pomante, “Criticality-aware Design Space Exploration  for  Mixed-Criticality  Embedded  Systems”,  In  Proceedings of  the  9th  ACM/SPEC  on  International  Conference  on  Performance Engineering (ICPE ’18), ACM, New York, NY, USA, 2018. https://dl.acm.org/citation.cfm?id=3185769, doi>10.1145/3185768.3185769. Link

– V. Muttillo, G. Valente, “Injecting Hypervisor-based Software Partitions into Design Space Exploration Activities considering Mixed-Criticality Requirements”, In 6th EUROMICRO/IEEE Workshop on Embedded  and Cyber-Physical Systems (ECYPS’2018), Budva, Montenegro, 2018. Link

– L. Pomante, G. Valente, V. Muttillo, “HEPSIM: an ESL HW/SW Co-Simulator/Analysis Tool for Heterogeneous Parallel Embedded Systems”, In 6th EUROMICRO/IEEE Workshop on Embedded  and Cyber-Physical Systems (ECYPS’2018), Budva, Montenegro, 2018. Link

- Design Space Exploration for Mixed-Criticality Embedded Systems considering Hypervisor-based SW Partitions

- Tuning DSE for Heterogeneous Multi-Processor Embedded Systems by means of a Self-Equalized Weighted Sum Method

- V. Muttillo. ESL HW/SW Co-Design Methodology for Mixed-Criticality and Real-Time Embedded Systems. DATE 2019 PhD Forum (LINK).

- G. D'Andrea. MECO: AN INNOVATIVE RUN-TIME MANAGER TO EVALUATE THE DYNAMIC PARTIAL RECONFIGURATION PROFITABILITY. Career Workshop for Women and Minorities in Computer Architectures, 2019 (LINK).

G. D'Andrea, T. Di Mascio and G. Valente, "Self-adaptive loop for CPSs: is the Dynamic Partial Reconfiguration profitable?," 2019 8th Mediterranean Conference on Embedded Computing (MECO), Budva, Montenegro, 2019. Paper.

- G. D'Andrea. Design For ReConfigurability: an Electronic System Level Methodology to exploit Reconfigurable Platforms. FPL2020 PhD Forum (LINK).

- G. Valente, T. Di Mascio, G. D’Andrea and L. Pomante, "Dynamic Partial Reconfiguration Profitability for Real-Time Systems," in IEEE Embedded Systems Letters (LINK).

- V. Muttillo, L. Pomante, P. Balbaste, J, Simò, A. Crespo. "HW/SW Co-Design Framework for Mixed-Criticality Embedded Systems considering Xtratum-based SW Partitions". DSD 2019 (LINK).

- V. Muttillo. "J4CS: An Early-Stage Statement-Level Metric for Energy Consumption of Embedded SW". ECYPS 2019 (LINK).

- M. Muttillo, V. Muttillo, L. Pomante and L. Pantoli, "A Low Cost and Flexible Power Line Communication Sensory System for Home Automation," 2020 IEEE International Workshop on Metrology for Industry 4.0 & IoT, Roma, Italy, 2020. Paper

- G. D’Andrea and G. Valente, "Work-In-Progress: Cyber-Physical Systems and Dynamic Partial Reconfiguration Scalability: opportunities and challenges," 2020 IEEE Real-Time Systems Symposium (RTSS), Houston, TX, USA, 2020, pp. 399-402. Paper, poster, slides, zip.

- G. Valente, T. Fanni, C. Sau, T. Di Mascio, L. Pomante, F. Palumbo, (in press). A composable monitoring system for heterogeneous embedded platforms. ACM Transactions on Embedded Computing Systems, 2021 (LINK).

- V. Muttillo, G. Valente, L. Pomante, H. Posadas, J. Merino and E. Villar, "Run-time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design Flow," 2020 23rd Euromicro Conference on Digital System Design (DSD), 2020, pp. 117-125 (LINK).

- V. Muttillo and V. Stoico, "Model-Based HW/SW Co-Design Methodology for UAV Systems Development," 2021 10th Mediterranean Conference on Embedded Computing (MECO), 2021, pp. 1-6 (LINK).

 

Booths, posters, fairs, exhibitions, business events,...

– G. Valente, V. Muttillo, W. Tiberti, L. Pomante, M. Faccio. F-OMP: A Feedback monitoring infrastructure for OpenMP on embedded systems. Design Automation Conference (DAC) – Univerity Demonstration, Austin, Texas, USA, 18-22/06/2017. Video: https://youtu.be/p3o4WXic7Xk. Extended Abstract

– V. Muttillo, G. Valente, L. Pomante. A Real-Time and Mixed Criticality Extension for a System-Level HW/SW Co-Design Methodology. Thirteenth International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES 2017), Fiuggi, Italy, 09-15/07/2017. Poster

– V. Muttillo, G. Valente, L. Pomante. System-Level HW/SW Co-Design Methodology for Real-Time and Mixed Criticality Applications. The first edition of CPS Summer School (Designing Cyber-Physical Systems – From concepts to implementation), Alghero, Italy, 25-29/09/2017. Poster

– G. Valente. A HW/SW Unified Approach for Embedded Systems Monitoring. The first edition of CPS Summer School (Designing Cyber-Physical Systems – From concepts to implementation), Alghero, Italy, 25-29/09/2017. Poster

– V. Muttillo, D. Ciambrone, V. Stoico, G. Valente, L. Pomante. HEPSYCODE-RTMC: a Real-Time and Mixed Criticality Extensions for a System-Level HW/SW Co-Design Methodology.The 2nd Italian Workshop on Embedded Systems, Roma, Italy, 25-29/09/2017. http://mclab.di.uniroma1.it/iwes2017/presentations.phtml?id=muttillo2

– V. Muttillo, G. Valente, L. Pomante.  System-Level HW/SW Co-Design Methodology for Real-Time and Mixed Criticality Applications. The 12th European Network on High Performance and Embedded Architecture and Compilation conference (HiPEAC), Manchester, United Kingdom, 22-24/01/2018. Poster

HEPSYCODE: V. Muttillo, G. Valente, L. Pomante. The 12th European Network on High Performance and Embedded Architecture and Compilation conference (HiPEAC), Manchester, United Kingdom. https://www.hipeac.net/events/activities/7546/hepsycode/, http://www.pomante.net/sito_gg/HiPEAC2018_HEPSYCODE.htm. Flyer

– V. Muttillo, G. Valente, L. Pomante. Criticality-aware Design Space Exploration for Mixed-Criticality Embedded Systems. The 9th ACM/SPEC International Conference on Performance Engineering (ICPE), Berlin, Germany, 09-13/04/2018. Poster

AQUAS Press Release, 17/04/2018: http://www.univaq.it/news_home.php?id=12020. PressRelease

- Gabriella D'Andrea, Tania Di Mascio, Luigi Pomante and Giacomo Valente. MECO: AN AUTONOMICMANAGER FOR EDGE-COMPUTING PLATFORMS. DATE 2019 U-BOOTH (LINK).

- V. Muttillo, L. Pomante, M. Santic, E. Incerto. HEPSYCODE-MC: ESL Methodology for HW/SW Co-Design of Mixed-Criticality Embedded Systems. DATE 2019 U-BOOTH (LINK).

- G. Valente, T. Fanni, C. Sau, C. Rubattu, F. Palumbo, L. Pomante. JOINTER: JOining flexIble moNitors wiTh hEterogeneous architectuRes. DATE 2020 U-BOOTH (LINK).

- V. Muttillo. Design space exploration for hypervisor-based mixed-criticality systems. Proceedings of the of the Summer School on CPS&IoT (Cyber Physical Systems and Internet of Things) 2019 (LINK).

 

Prototypes

ECSEL FITOPTIVIS (D3.3) - HEPSYCODE timing/energy: Digital Camera (LINK)

Embedded Systems Course 2024-2025

 

Projects & Thesis

 

HEPSYCODE

 

horizontal rule